I wrote this piece to highlight a 2016 paper that pre-dated the current DPU/SmartNIC trend. It’s a remarkable example of offloading complex database scans to hand-written Verilog on the NIC. Curious to hear what others think about this architectural approach in the context of modern AI infrastructure.
I wrote this piece to highlight a 2016 paper that pre-dated the current DPU/SmartNIC trend. It’s a remarkable example of offloading complex database scans to hand-written Verilog on the NIC. Curious to hear what others think about this architectural approach in the context of modern AI infrastructure.